Exokernel design with Hardware Abstraction Layer and multi-architecture support
AlJefra OS uses an exokernel architecture that minimizes the kernel's responsibility by delegating hardware management to user-level drivers and applications. The kernel provides minimal abstractions, giving applications direct (safe) access to hardware resources while maintaining isolation and security.
This design philosophy enables:
The HAL provides a unified interface that abstracts away architecture-specific details. All drivers and kernel components use the HAL to interact with hardware, allowing the same portable C code to run on any supported architecture.
By implementing the HAL interface for each architecture, we achieve true code reuse: 22+ portable C drivers work identically on x86-64, ARM64, and RISC-V without modification.
Rather than maintaining separate OS versions for different architectures, AlJefra OS provides a single unified codebase with architecture-specific implementations of the HAL layer. This approach ensures:
┌─────────────────────────────────────────┐
│ Applications / AI Agent │
├─────────────────────────────────────────┤
│ Kernel Core (C, portable) │
│ scheduler · syscalls · driver loader │
├─────────────────────────────────────────┤
│ Portable Drivers (C) │
│ NVMe·AHCI·VirtIO·e1000·WiFi·USB·PCIe │
├─────────────────────────────────────────┤
│ HAL — Hardware Abstraction Layer │
├────────────┬────────────┬───────────────┤
│ x86-64 │ AArch64 │ RISC-V 64 │
│ APIC/HPET │ GIC/Timer │ PLIC/mtime │
└────────────┴────────────┴───────────────┘
The Hardware Abstraction Layer defines a portable interface that all architectures must implement. Key HAL functions include:
| Function | Purpose |
|---|---|
hal_cpu_init() |
Initialize CPU: set up control registers, enable caches, detect features |
hal_irq_init() |
Initialize interrupt controller and set up IRQ routing |
hal_timer_init() |
Initialize system timer and set up periodic interrupts |
hal_bus_scan() |
Enumerate and discover devices on PCIe, USB, or device tree |
hal_mmio_read32(addr) |
Read 32-bit value from memory-mapped I/O register |
hal_mmio_write32(addr, value) |
Write 32-bit value to memory-mapped I/O register |
hal_console_putc(c) |
Output single character to debug console |
hal_mmu_map(vaddr, paddr, size, flags) |
Map virtual address to physical address in page tables |
hal_smp_init() |
Initialize SMP and bring up additional CPU cores |
AlJefra OS boots through the following sequence:
Power On
↓
Firmware (UEFI/BIOS)
↓
Bootloader (loads AlJefra kernel)
↓
HAL Initialization
├─ CPU: set up control registers, detect features
├─ MMU: enable virtual memory, set up page tables
├─ Interrupts: initialize interrupt controller
└─ Timer: set up system timer
↓
Kernel Main
├─ Initialize kernel data structures
├─ Launch process manager and scheduler
└─ Load bootloader drivers
↓
Bus Enumeration
├─ Scan PCIe/USB/Device Tree
├─ Discover available devices
└─ Sync machine state and load device drivers via marketplace
↓
Network Initialization
├─ Initialize NIC driver
├─ Configure TCP/IP stack
└─ Join network
↓
AI Bootstrap
├─ Register machine + desired apps with AlJefra Store
├─ Send hardware manifest to AlJefra Store
├─ Receive driver recommendations and queued work
├─ Download optimized drivers
├─ Verify signatures (Ed25519)
└─ Install drivers
↓
System Ready
└─ Applications can launch
| Architecture | CPU Instructions | Interrupt Handler | Timer | MMU | Status |
|---|---|---|---|---|---|
| x86-64 | CPUID, MSR, privileged instructions | APIC / I/O APIC | HPET / TSC | 4-level page tables | Verified |
| ARM64 (AArch64) | ARMv8 system instructions | GICv2 / GICv3 | Generic Timer | 4-level page tables (Armv8.x) | Verified |
| RISC-V 64 | RV64GC ISA extensions | PLIC (Platform-Level Interrupt Controller) | mtime (machine timer) | Sv39 / Sv48 virtual memory | Verified |
All drivers are written in portable C and use the HAL interface. This ensures the same driver code runs identically on x86-64, ARM64, and RISC-V.
| Category | Drivers |
|---|---|
| Storage | NVMe, AHCI (SATA), VirtIO-Blk, eMMC, UFS |
| Network | Intel e1000, VirtIO-Net, Intel WiFi, Realtek RTL8169, Broadcom BCM WiFi |
| Input Devices | xHCI (USB 3.0), USB HID, PS/2 Keyboard/Mouse, Touchscreen |
| Display & Output | Framebuffer (VESA/EFI GOP), Serial Console |
| Bus Controllers | PCIe (PCI Express), Device Tree Parser, ACPI (lite subset) |